FIG. 6 is a circuit diagram showing an example of an automobile power module. As shown in FIG. 6, the power module is provided with a converter section 1, a break section 2, an inverter section 3, and a thermistor 4. The converter section 1 has converter diodes 5 each ordinarily made of a PIN diode. For example, for a module with a rated voltage of 1200V or 600V, a PIN diode with a breakdown voltage of 1600V or above or 800V or above is used, respectively, as a converter diode 5. The reason that the breakdown voltage is above the rated voltage is because the voltage higher than the rated voltage is sometimes applied to the module. This protects the PIN diode against breakdown in such a case. Moreover, in the PIN diode used as the converter diode 5, the diode 5 needs to have a low forward voltage VF. For example, in a converter diode 5 with a module rated voltage of 1200V, a required value for the forward voltage VF is on the order of 1.2 to 1.5 V.
FIG. 7 is a cross sectional view showing a structure of a related planar PIN diode. As shown in FIG. 7, on an n+-semiconductor layer 11, an n−-semiconductor layer 12 (a cathode region) is formed. In the surface layer of the n−-semiconductor layer 12, a p+-diffusion region 13 (an anode region) and p+-diffusion regions 14 and 15 (guard ring regions) are formed.
The surfaces of the p+-diffusion regions 14 and 15 are covered with an insulator layer film 16 such as a SiO2 film. An anode electrode 17 is formed on and in contact with the p+-diffusion layer 13. The n+-semiconductor layer 11 is electrically in contact with a cathode electrode 18. In the specification and the attached drawings, a leading character “n” or “p” attached to a name of a layer or a region means that carriers in the layer or the region are electrons or holes, respectively. Moreover, a sign “+”, “−”, or “−−” attached to the right and above of the leading character “n” or “p” represents that impurity concentration in the layer or the region is comparatively high, comparatively low, or lower, respectively.
Specifications such as dimensions of sections in the related converter diode 5 are as follows. In a module with a rated voltage of 1200V and a breakdown voltage of 1600V, the thickness of the n−-semiconductor layer 12, made of an FZ wafer having specific resistance of about 120 Ωcm, is 300 μm. The p+-diffusion layer 13 is formed to a depth of 6 to 8 μm with a dose of 1×1015 cm−2.
In a module with a rated voltage of 600V and a breakdown voltage of 800V, the thickness of the n−-semiconductor layer 12, made of a diffusion wafer having specific resistance of about 40Ωcm, is on the order of 80 μm. Regarding the p+-diffusion layer 13, the depth and the dose are the same as those of the module with the rated voltage of 1200V.
In the above-described power module, when a lightening surge is input to the module while the converter section 1 is being operated, a surge with a high decay rate of a reverse recovery current (hereinafter expressed as a di/dt) is applied to the converter section 1. This brings the converter diode 5 into a violent reverse recovery operation mode, which sometimes can damage the converter diode 5 that cannot withstand a high di/dt as shown in FIG. 8. FIG. 8 is a waveform diagram showing waveforms of a current I and a voltage V when a surge with a high di/dt is input to a related converter section 1 to damage the converter diode 5. In the waveform diagram in FIG. 8, the vertical axis represents the current I and the voltage V, and the horizontal axis represents a time with one scale division on the axis taken as 100 A for the current I, 200V for the voltage V, and 1 μsec for the time.
In order to prevent such a problem from occurring, for a converter section 1 mounted on a power module, it has been required in recent years that the converter section 1 be able to withstand a surge with a high di/dt such as a lightening surge. In the following, the capability against such a di/dt is to be expressed as a di/dt capability.
In the reverse recovery operation mode of the diode, heat generation due to current excessively concentrated in a peripheral section of a chip results in damage of the diode. For avoiding this, there is a proposal in which a region with carriers having a short lifetime is formed only in an end section of an electrode of the diode by He ion irradiation to enhance a reverse recovery capability (see JP-A-2001-135831, for example). Forming a region with carriers having a short lifetime by He ion irradiation is described in JP-A-10-116998, for example.
Moreover, a high speed diode is known in which a lifetime killer is introduced around a p-n junction with a junction depth of 4 to 8 μm to shorten a lifetime of carriers around the p-n junction (see JP-A-10-200132, for example). In addition, a semiconductor device is known in which, to a diode having a p-n junction with a junction depth of the order of 3 μm, He ion irradiation is carried out within the range of 10 to 30 μm in depth to introduce a region with carriers having a shortened lifetime in an n−-layer under a p-layer (see JP-A-2003-249662, for example). Furthermore, a method of manufacturing a semiconductor element is known in which heavy metal as a lifetime killer is introduced by thermal diffusion (see JP-A-2004-6664, for example).
Incidentally, specifications such as dimensions of sections in a freewheeling diode 6 (see FIG. 6) in the inverter section 3 are as follows. With a breakdown voltage of 1200V, in an epitaxial wafer having an n−−-semiconductor layer and an n−-semiconductor layer, the thickness of the n−−-semiconductor layer, having specific resistance of about 65 Ωcm, is about 70 μm. The thickness of the n−-semiconductor layer, having specific resistance of about 40 Ωcm, is about 50 μm.
With a breakdown voltage of 600V, in a similar epitaxial wafer, the thickness of an n−−-semiconductor layer, having specific resistance of about 25 Ωcm, is about 45 μm. The thickness of an n−-semiconductor layer, having specific resistance of about 15 Ωcm, is about 25 μm. In both of the epitaxial wafers with the above breakdown voltages, p+-diffusion layers are formed to a depth of 3 to 4 μm with a dose of the order of 1×1013 cm−2.
The technologies described in the above references relate to soft recovery characteristics at reverse recovery when the semiconductor devices are ordinarily operated and protection of breakdown at reverse recovery with the soft recovery characteristics. The di/dt in the ordinary recovery characteristics is on the order of 500 to 1000 A/sec.
Compared with this, the di/dt of a lightening surge supposed to be input to the converter section is about 3500 A/μsec. Therefore, the di/dt capabilities obtained by the technologies described in the above references are insufficient for the di/dt of a high surge such as a lightening surge. Experiments actually carried out by the present inventors have proved that it is impossible with the technologies described in all of the above references to obtain such a high di/dt capability as to be effective against a surge such as a lightening surge.
For example, it is known that a di/dt capability is improved to some extent by introducing a lifetime killer onto the whole surface of a diode to reduce carrier lifetime over the whole surface of a chip. This, however, necessitates a significantly increase in a forward voltage VF. In a converter diode, however, as explained above, the forward voltage VF needs to be low. Thus, it is not preferable to increase the forward voltage VF.
Moreover, a di/dt capability is also improved to some extent by locally reducing a lifetime of carriers in a peripheral section and end section of a chip. However, no di/dt capability can be obtained that is sufficiently high to such an extent that the chip can withstand a lightening surge. Furthermore, in this case, for locally introducing a lifetime killer, it is necessary to form a thick shielding film for sections into which no lifetime killer is introduced and to remove the shielding film. This therefore complicates the manufacturing process, resulting in an increase in a chip cost.
In addition, even though a region with a short lifetime of carriers is locally formed in the depth direction on the surface of the chip or in its vicinity by using He ions or protons, no sufficient di/dt capability can be obtained. Further, in the case of diffusing heavy metal as a lifetime killer, there is difficulty in controlling the diffusion depth of the heavy metal.
There remains a need to solve the problems in the above-explained related art. The present invention addresses this need